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BS EN IEC 62680-1-2:2021

BS EN IEC 62680-1-2:2021

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Universal serial bus interfaces for data and power – Common components. USB Power Delivery specification

Published By Publication Date Number of Pages
BSI 2021 648
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IEC 62680-1-2:2021 defines a power delivery system covering all elements of a USB system including: Hosts, Devices, Hubs, Chargers and cable assemblies. This specification describes the architecture, protocols, power supply behavior, connectors and cabling necessary for managing power delivery over USB at up to 100W. This specification is intended to be fully compatible and extend the existing USB infrastructure. It is intended that this specification will allow system OEMs, power supply and peripheral developers adequate flexibility for product versatility and market differentiation without losing backwards compatibility. This fourth edition cancels and replaces the fourth edition published in 2019 and constitutes a technical revision. It is also identified as USB Power Delivery Specification, Revision 3.0, Version 2.0 This updated release of the USB PD specification was made to incorporate all the ECNs that were made to USB PD 3.0, V1.2. This makes a full completed printed specifications with all ECNs incorporated into a hard copy specification.

PDF Catalog

PDF Pages PDF Title
2 undefined
4 European foreword
Endorsement notice
6 FOREWORD
18 English
Table of Contents
43 1. Introduction
1.1 Overview
44 1.2 Purpose
1.3 Scope
45 1.4 Conventions
1.4.1 Precedence
1.4.2 Keywords
46 1.4.3 Numbering
1.5 Related Documents
47 1.6 Terms and Abbreviations
Tables
Table 11 Terms and Abbreviations
55 1.7 Parameter Values
1.8 Changes from Revision 2.0
1.9 Compatibility with Revision 2.0
56 2. Overview
2.1 Introduction
57 2.2 Section Overview
58 2.3 Compatibility with Revision 2.0
2.4 USB Power Delivery Capable Devices
Figures
Figure 21 Logical Structure of USB Power Delivery Capable Devices
59 2.5 SOP* Communication
2.5.1 Introduction
2.5.2 SOP* Collision Avoidance
2.5.3 SOP Communication
2.5.4 SOPā€™/SOPā€™ā€™ Communication with Cable Plugs
60 Figure 22 Example SOPā€™ Communication between Vconn Source and Cable Plug(s)
61 2.6 Operational Overview
2.6.1 Source Operation
63 2.6.2 Sink Operation
64 2.6.3 Cable Plugs
65 2.7 Architectural Overview
66 Figure 23 USB Power Delivery Communications Stack
Figure 24 USB Power Delivery Communication Over USB
68 2.7.1 Policy
Figure 25 High Level Architecture View
69 2.7.2 Message Formation and Transmission
2.7.3 Collision Avoidance
70 2.7.4 Power supply
2.7.5 DFP/UFP
71 2.7.6 Cable and Connectors
2.7.7 Interactions between Non-PD, BC and PD devices
2.7.8 Power Rules
72 3. USB Type-A and USB Type-B Cable Assemblies and Connectors
73 4. Electrical Requirements
4.1 Interoperability with other USB Specifications
4.2 Dead Battery Detection / Unpowered Port Detection
4.3 Cable IR Ground Drop (IR Drop)
4.4 Cable Type Detection
74 5. Physical Layer
5.1 Physical Layer Overview
5.2 Physical Layer Functions
75 5.3 Symbol Encoding
Table 51 4b5b Symbol Encoding Table
76 5.4 Ordered Sets
Figure 51 Interpretation of ordered sets
Table 52 Ordered Sets
Table 53 Validation of Ordered Sets
77 5.5 Transmitted Bit Ordering
Figure 52 Transmit Order for Various Sizes of Data
Table 54 Data Size
78 5.6 Packet Format
5.6.1 Packet Framing
Figure 53 USB Power Delivery Packet Format
Table 55 SOP ordered set
79 Table 56 SOPā€™ ordered set
Table 57 SOPā€™ā€™ ordered set
80 5.6.2 CRC
Table 58 SOPā€™_Debug ordered set
Table 59 SOPā€™ā€™_Debug ordered set
81 Figure 54 CRC 32 generation
Table 510 CRC-32 Mapping
82 5.6.3 Packet Detection Errors
5.6.4 Hard Reset
Table 511 Hard Reset ordered set
83 5.6.5 Cable Reset
5.7 Collision Avoidance
Figure 55 Line format of Hard Reset
Figure 56 Line format of Cable Reset
Table 512 Cable Reset ordered set
84 5.8 Biphase Mark Coding (BMC) Signaling Scheme
5.8.1 Encoding and signaling
Figure 57 BMC Example
Table 513 Rp values used for Collision Avoidance
85 Figure 58 BMC Transmitter Block Diagram
Figure 59 BMC Receiver Block Diagram
Figure 510 BMC Encoded Start of Preamble
86 Figure 511 Transmitting or Receiving BMC Encoded Frame Terminated by Zero with High-to-Low Last Transition
Figure 512 Transmitting or Receiving BMC Encoded Frame Terminated by One with High-to-Low Last Transition
87 5.8.2 Transmit and Receive Masks
Figure 513 Transmitting or Receiving BMC Encoded Frame Terminated by Zero with Low to High Last Transition
Figure 514 Transmitting or Receiving BMC Encoded Frame Terminated by One with Low to High Last Transition
88 Figure 515 BMC Tx ā€˜ONEā€™ Mask
Figure 516 BMC Tx ā€˜ZEROā€™ Mask
Table 514 BMC Tx Mask Definition, X Values
89 Table 515 BMC Tx Mask Definition, Y Values
90 Figure 517 BMC Rx ā€˜ONEā€™ Mask when Sourcing Power
91 Figure 518 BMC Rx ā€˜ZEROā€™ Mask when Sourcing Power
Figure 519 BMC Rx ā€˜ONEā€™ Mask when Power neutral
92 Figure 520 BMC Rx ā€˜ZEROā€™ Mask when Power neutral
Figure 521 BMC Rx ā€˜ONEā€™ Mask when Sinking Power
93 5.8.3 Transmitter Load Model
Figure 522 BMC Rx ā€˜ZEROā€™ Mask when Sinking Power
Table 516 BMC Rx Mask Definition
94 5.8.4 BMC Common specifications
Figure 523 Transmitter Load Model for BMC Tx from a Source
Figure 524 Transmitter Load Model for BMC Tx from a Sink
95 5.8.5 BMC Transmitter Specifications
Table 517 BMC Common Normative Requirements
Table 518 BMC Transmitter Normative Requirements
96 Figure 525 Transmitter diagram illustrating zDriver
97 5.8.6 BMC Receiver Specifications
Figure 526 Inter-Frame Gap Timings
98 Table 519 BMC Receiver Normative Requirements
99 Figure 527 Example Multi-Drop Configuration showing two DRPs
Figure 528 Example Multi-Drop Configuration showing a DFP and UFP
101 5.9 Built in Self-Test (BIST)
5.9.1 BIST Carrier Mode
5.9.2 BIST Test Data
Figure 529 Test Data Frame
102 6. Protocol Layer
6.1 Overview
6.2 Messages
6.2.1 Message Construction
Figure 61 USB Power Delivery Packet Format including Control Message Payload
103 Figure 62 USB Power Delivery Packet Format including Data Message Payload
Figure 63 USB Power Delivery Packet Format including an Extended Message Header and Payload
Table 61 Message Header
106 Table 62 Revision Interoperability during an Explicit Contract
107 Table 63 Extended Message Header
109 Figure 64 Example Security_Request sequence Unchunked (Chunked bit = 0)
Figure 65 Example byte transmission for Security_Request Message of Data Size 7 (Chunked bit is set to 0)
Table 64 Use of Unchunked Message Supported bit
110 Figure 66 Example byte transmission for Security_Response Message of Data Size 7 (Chunked bit is set to 0)
Figure 67 Example Security_Request sequence Chunked (Chunked bit = 1)
111 Figure 68 Example Security_Request Message of Data Size 7 (Chunked bit set to 1)
Figure 69 Example Chunk 0 of Security_Response Message of Data Size 30 (Chunked bit set to 1)
Figure 610 Example byte transmission for a Security_Response Message Chunk request (Chunked bit is set to 1)
112 6.3 Control Message
Figure 611 Example Chunk 1 of Security_Response Message of Data Size 30 (Chunked bit set to 1)
Table 65 Control Message Types
113 6.3.1 GoodCRC Message
6.3.2 GotoMin Message
6.3.3 Accept Message
114 6.3.4 Reject Message
6.3.5 Ping Message
6.3.6 PS_RDY Message
6.3.7 Get_Source_Cap Message
115 6.3.8 Get_Sink_Cap Message
6.3.9 DR_Swap Message
6.3.10 PR_Swap Message
116 6.3.11 VCONN_Swap Message
117 6.3.12 Wait Message
118 6.3.13 Soft Reset Message
6.3.14 Data_Reset Message
119 6.3.15 Data_Reset_Complete Message
6.3.16 Not_Supported Message
6.3.17 Get_Source_Cap_Extended Message
6.3.18 Get_Status Message
6.3.19 FR_Swap Message
120 6.3.20 Get_PPS_Status
6.3.21 Get_Country_Codes
6.3.22 Get_Sink_Cap_Extended Message
6.4 Data Message
Table 66 Data Message Types
121 6.4.1 Capabilities Message
Figure 612 Example Capabilities Message with 2 Power Data Objects
122 Table 67 Power Data Object
Table 68 Augmented Power Data Object
124 Table 69 Fixed Supply PDO – Source
126 Table 610 Fixed Power Source Peak Current Capability
Table 611 Variable Supply (non-Battery) PDO – Source
127 Table 612 Battery Supply PDO – Source
Table 613 Programmable Power Supply APDO – Source
128 Table 614 Fixed Supply PDO – Sink
130 6.4.2 Request Message
Table 615 Variable Supply (non-Battery) PDO – Sink
Table 616 Battery Supply PDO – Sink
Table 617 Programmable Power Supply APDO – Sink
131 Table 618 Fixed and Variable Request Data Object
Table 619 Fixed and Variable Request Data Object with GiveBack Support
Table 620 Battery Request Data Object
132 Table 621 Battery Request Data Object with GiveBack Support
Table 622 Programmable Request Data Object
135 6.4.3 BIST Message
Figure 613 BIST Message
136 Table 623 BIST Data Object
137 6.4.4 Vendor Defined Message
138 Figure 614 Vendor Defined Message
Table 624 Unstructured VDM Header
139 Table 625 Structured VDM Header
140 Table 626 Structured VDM Commands
Table 627 SVID Values
142 Table 628 Commands and Responses
143 Figure 615 Discover Identity Command response
Figure 616 Discover Identity Command response for a DRD
144 Table 629 ID Header VDO
145 Table 630 Product Types (UFP)
Table 631 Product Types (Cable Plug)
Table 632 Product Types (DFP)
146 Table 633 Cert Stat VDO
Table 634 Product VDO
147 Table 635 UFP VDO 1
148 Table 636 UFP VDO 2
149 Table 637 DFP VDO
150 Table 638 Passive Cable VDO
152 Table 639 Active Cable VDO 1
154 Table 640 Active Cable VDO 2
156 Table 641 AMA VDO
157 Table 642 VPD VDO
158 Table 643 Discover SVIDs Responder VDO
159 Figure 617 Example Discover SVIDs response with 3 SVIDs
Figure 618 Example Discover SVIDs response with 4 SVIDs
Figure 619 Example Discover SVIDs response with 12 SVIDs followed by an empty response
Figure 620 Example Discover Modes response for a given SVID with 3 Modes
161 Figure 621 Successful Enter Mode sequence
Figure 622 Enter Mode sequence Interrupted by Source Capabilities and then Re-run
162 Figure 623 Unsuccessful Enter Mode sequence due to NAK
163 Figure 624 Exit Mode sequence
Figure 625 Attention Command request/response sequence
164 Figure 626 Command request/response sequence
165 Figure 627 Enter/Exit Mode Process
166 6.4.5 Battery_Status Message
Figure 628 Battery_Status Message
Table 644 Battery Status Data Object (BSDO)
167 6.4.6 Alert Message
Figure 629 Alert Message
Table 645 Alert Data Object
169 6.4.7 Get_Country_Info Message
6.4.8 Enter_USB Message
Figure 630 Get_Country_Info Message
Figure 631 Enter_USB Message
Table 646 Country Code Data Object
170 Table 647 Enter_USB Data Object
171 6.5 Extended Message
Table 648 Extended Message Types
172 6.5.1 Source_Capabilities_Extended Message
Figure 632 Source_Capabilities_Extended Message
Table 649 Source Capabilities Extended Data Block (SCEDB)
176 6.5.2 Status Message
Figure 633 SOP Status Message
Table 650 SOP Status Data Block (SDB)
178 Figure 634 SOPā€™/SOPā€™ā€™ Status Message
179 6.5.3 Get_Battery_Cap Message
6.5.4 Get_Battery_Status Message
Figure 635 Get_Battery_Cap Message
Table 651 SOPā€™/SOPā€™ā€™ Status Data Block (SDB)
Table 652 Get Battery Cap Data Block (GBCDB)
180 6.5.5 Battery_Capabilities Message
Figure 636 Get_Battery_Status Message
Figure 637 Battery_Capabilities Message
Table 653 Get Battery Status Data Block (GBSDB)
Table 654 Battery Capability Data Block (BCDB)
181 6.5.6 Get_Manufacturer_Info Message
6.5.7 Manufacturer_Info Message
Figure 638 Get_Manufacturer_Info Message
Table 655 Get Manufacturer Info Data Block (GMIDB)
182 6.5.8 Security Messages
Figure 639 Manufacturer_Info Message
Table 656 Manufacturer Info Data Block (MIDB)
183 6.5.9 Firmware Update Messages
Figure 640 Security_Request Message
Figure 641 Security_Response Message
Figure 642 Firmware_Update_Request Message
184 6.5.10 PPS_Status Message
Figure 643 Firmware_Update_Response Message
Figure 644 PPS_Status Message
Table 657 PPS Status Data Block (PPSSDB)
185 6.5.11 Country_Codes Message
Figure 645 Country_Codes Message
Table 658 Country Codes Data Block (CCDB)
186 6.5.12 Country_Info Message
6.5.13 Sink_Capabilities_Extended Message
Figure 646 Country_Info Message
Figure 647 Sink_Capabilities_Extended Message
Table 659 Country Info Data Block (CIDB)
187 Table 660 Sink Capabilities Extended Data Block (SKEDB)
190 6.6 Timers
6.6.1 CRCReceiveTimer
6.6.2 SenderResponseTimer
6.6.3 Capability Timers
191 6.6.4 Wait Timers and Times
192 6.6.5 Power Supply Timers
193 6.6.6 NoResponseTimer
194 6.6.7 BIST Timers
6.6.8 Power Role Swap Timers
6.6.9 Soft Reset Timers
195 6.6.10 Data Reset Timers
6.6.11 Hard Reset Timers
196 6.6.12 Structured VDM Timers
197 6.6.13 Vconn Timers
6.6.14 tCableMessage
6.6.15 DiscoverIdentityTimer
6.6.16 Collision Avoidance Timers
198 6.6.17 Fast Role Swap Timers
6.6.18 Chunking Timers
199 6.6.19 Programmable Power Supply Timers
6.6.20 tEnterUSB
200 6.6.21 Time Values and Timers
201 Table 661 Time Values
202 Table 662 Timers
204 6.7 Counters
6.7.1 MessageID Counter
6.7.2 Retry Counter
205 6.7.3 Hard Reset Counter
6.7.4 Capabilities Counter
6.7.5 Discover Identity Counter
6.7.6 VDMBusyCounter
6.7.7 Counter Values and Counters
Table 663 Counter parameters
206 6.8 Reset
6.8.1 Soft Reset and Protocol Error
Table 664 Counters
207 Table 665 Response to an incoming Message (except VDM)
208 6.8.2 Data Reset
6.8.3 Hard Reset
Table 666 Response to an incoming VDM
209 6.8.4 Cable Reset
6.9 Collision Avoidance
6.10 Message Discarding
210 Table 667 Message discarding
211 6.11 State behavior
6.11.1 Introduction to state diagrams used in Chapter 6
6.11.2 State Operation
Figure 648 Outline of States
Figure 649 References to states
212 Figure 650 Chunking architecture Showing Message and Control Flow
214 Figure 651 Chunked Rx State Diagram
217 Figure 652 Chunked Tx State Diagram
220 Figure 653 Chunked Message Router State Diagram
222 Figure 654 Common Protocol Layer Message Transmission State Diagram
225 Figure 655 Source Protocol Layer Message Transmission State Diagram
226 Figure 656 Sink Protocol Layer Message Transmission State Diagram
228 Figure 657 Protocol layer Message reception
230 Figure 658 Hard/Cable Reset
233 6.11.3 List of Protocol Layer States
Table 668 Protocol Layer States
235 6.12 Message Applicability
236 6.12.1 Applicability of Control Messages
Table 669 Applicability of Control Messages
237 6.12.2 Applicability of Data Messages
Table 670 Applicability of Data Messages
238 6.12.3 Applicability of Extended Messages
Table 671 Applicability of Extended Messages
239 6.12.4 Applicability of Structured VDM Commands
Table 672 Applicability of Structured VDM Commands
240 6.12.5 Applicability of Reset Signaling
6.12.6 Applicability of Fast Role Swap signal
Table 673 Applicability of Reset Signaling
Table 674 Applicability of Fast Role Swap signal
241 6.13 Value Parameters
Table 675 Value Parameters
242 7. Power Supply
7.1 Source Requirements
7.1.1 Behavioral Aspects
7.1.2 Source Bulk Capacitance
7.1.3 Types of Sources
Figure 71 Placement of Source Bulk Capacitance
243 7.1.4 Source Transitions
Figure 72 Transition Envelope for Positive Voltage Transitions
244 Figure 73 Transition Envelope for Negative Voltage Transitions
245 Figure 74 PPS Positive Voltage Transitions
246 Figure 75 PPS Negative Voltage Transitions
Figure 76 Expected PPS Ripple Relative to an LSB
248 Figure 77 PPS Programmable Voltage and Current Limit
249 Figure 78 iPpsCLOperatingDetail
250 7.1.5 Response to Hard Resets
Figure 79 PPS Programmable Voltage and Current Limit
251 7.1.6 Changing the Output Power Capability
7.1.7 Robust Source Operation
Figure 710 Source VBUS and Vconn Response to Hard Reset
252 7.1.8 Output Voltage Tolerance and Range
253 7.1.9 Charging and Discharging the Bulk Capacitance on VBUS
7.1.10 Swap Standby for Sources
Figure 711 Application of vSrcNew and vSrcValid limits after tSrcReady
254 7.1.11 Source Peak Current Operation
Figure 712 Source Peak Current Overload
255 7.1.12 Source Capabilities Extended Parameters
256 Figure 713 Holdup Time Measurement
257 7.1.13 Fast Role Swap
Figure 714 VBUS Power during Fast Role Swap
258 7.1.14 Non-application of VBUS Slew Rate Limits
Figure 715 VBUS detection and timing during Fast Role Swap, initial VBUS (at new source) > vSafe5V (min).
Figure 716 VBUS detection and timing during Fast Role Swap, initial VBUS (at new source) < vSafe5V (min).
259 7.1.15 Vconn Power Cycle
Figure 717 Data Reset UFP Vconn Power Cycle
260 7.2 Sink Requirements
7.2.1 Behavioral Aspects
7.2.2 Sink Bulk Capacitance
Figure 718 Data Reset DFP Vconn Power Cycle
261 7.2.3 Sink Standby
7.2.4 Suspend Power Consumption
7.2.5 Zero Negotiated Current
7.2.6 Transient Load Behavior
Figure 719 Placement of Sink Bulk Capacitance
262 7.2.7 Swap Standby for Sinks
7.2.8 Sink Peak Current Operation
7.2.9 Robust Sink Operation
263 7.2.10 Fast Role Swap
265 7.3 Transitions
266 7.3.1 Increasing the Current
Figure 720 Transition Diagram for Increasing the Current
267 Table 71 Sequence Description for Increasing the Current
268 7.3.2 Increasing the Voltage
Figure 721 Transition Diagram for Increasing the Voltage
269 Table 72 Sequence Description for Increasing the Voltage
270 7.3.3 Increasing the Voltage and Current
Figure 722 Transition Diagram for Increasing the Voltage and Current
271 Table 73 Sequence Diagram for Increasing the Voltage and Current
272 7.3.4 Increasing the Voltage and Decreasing the Current
Figure 723 Transition Diagram for Increasing the Voltage and Decreasing the Current
273 Table 74 Sequence Description for Increasing the Voltage and Decreasing the Current
274 7.3.5 Decreasing the Voltage and Increasing the Current
Figure 724 Transition Diagram for Decreasing the Voltage and Increasing the Current
275 Table 75 Sequence Description for Decreasing the Voltage and Increasing the Current
276 7.3.6 Decreasing the Current
Figure 725 Transition Diagram for Decreasing the Current
277 Table 76 Sequence Description for Decreasing the Current
278 7.3.7 Decreasing the Voltage
Figure 726 Transition Diagram for Decreasing the Voltage
279 Table 77 Sequence Description for Decreasing the Voltage
280 7.3.8 Decreasing the Voltage and the Current
Figure 727 Transition Diagram for Decreasing the Voltage and the Current
281 Table 78 Sequence Description for Decreasing the Voltage and the Current
282 7.3.9 Sink Requested Power Role Swap
Figure 728 Transition Diagram for a Sink Requested Power Role Swap
283 Table 79 Sequence Description for a Sink Requested Power Role Swap
285 7.3.10 Source Requested Power Role Swap
Figure 729 Transition Diagram for a Source Requested Power Role Swap
286 Table 710 Sequence Description for a Source Requested Power Role Swap
288 7.3.11 GotoMin Current Decrease
Figure 730 Transition Diagram for a GotoMin Current Decrease
289 Table 711 Sequence Description for a GotoMin Current Decrease
290 7.3.12 Source Initiated Hard Reset
Figure 731 Transition Diagram for a Source Initiated Hard Reset
291 Table 712 Sequence Description for a Source Initiated Hard Reset
292 7.3.13 Sink Initiated Hard Reset
Figure 732 Transition Diagram for a Sink Initiated Hard Reset
293 Table 713 Sequence Description for a Sink Initiated Hard Reset
294 7.3.14 No change in Current or Voltage
Figure 733 Transition Diagram for no change in Current or Voltage
295 Table 714 Sequence Description for no change in Current or Voltage
296 7.3.15 Fast Role Swap
Figure 734 Transition Diagram for Fast Role Swap
Table 715 Sequence Description for Fast Role Swap
298 7.3.16 Increasing the Programmable Power Supply Voltage
Figure 735 Transition Diagram for Increasing the Programmable Power Supply Voltage
Table 716 Sequence Description for Increasing the Programmable Power Supply Voltage
300 7.3.17 Decreasing the Programmable Power Supply Voltage
Figure 736 Transition Diagram for Decreasing the Programmable Power Supply Voltage
301 Table 717 Sequence Description for Decreasing the Programmable Power Supply Voltage
302 7.3.18 Changing the Source PDO or APDO
Figure 737 Transition Diagram for Changing the Source PDO or APDO
Table 718 Sequence Description for Changing the Source PDO or APDO
304 7.3.19 Increasing the Programmable Power Supply Current
Figure 738 Transition Diagram for increasing the Current in PPS mode
305 Table 719 Sequence Description for increasing the Current in PPS mode
306 7.3.20 Decreasing the Programmable Power Supply Current
Figure 739 Transition Diagram for decreasing the Current in PPS mode
307 Table 720 Sequence Description for decreasing the Current in PPS mode
308 7.3.21 Same Request Programmable Power Supply
Figure 740 Transition Diagram for no change in Current or Voltage in PPS mode
Table 721 Sequence Description for increasing the Current in PPS mode
309 7.4 Electrical Parameters
7.4.1 Source Electrical Parameters
Table 722 Source Electrical Parameters
313 7.4.2 Sink Electrical Parameters
Table 723 Sink Electrical Parameters
314 7.4.3 Common Electrical Parameters
315 Table 724 Common Source/Sink Electrical Parameters
316 8. Device Policy
8.1 Overview
8.2 Device Policy Manager
317 8.2.1 Capabilities
8.2.2 System Policy
318 8.2.3 Control of Source/Sink
8.2.4 Cable Detection
8.2.5 Managing Power Requirements
320 8.2.6 Use of ā€œUnconstrained Powerā€ bit with Batteries and AC supplies
321 Figure 81 Example of daisy chained displays
322 8.2.7 Interface to the Policy Engine
323 8.3 Policy Engine
8.3.1 Introduction
8.3.2 Atomic Message Sequence Diagrams
324 Figure 82 Basic Message Exchange (Successful)
Table 81 Basic Message Flow
325 Figure 83 Basic Message flow indicating possible errors
Table 82 Potential issues in Basic Message Flow
326 Figure 84 Basic Message Flow with Bad CRC followed by a Retry
Table 83 Basic Message Flow with CRC failure
328 Table 84 Interruptible and Non-interruptible AMS
330 Figure 85 Successful Fixed, Variable or Battery Power Negotiation
Table 85 Steps for a successful Power Negotiation
333 Figure 86 Successful GotoMin operation
Table 86 Steps for a GotoMin Negotiation
335 Figure 87 PPS Keep Alive
Table 87 Steps for a successful Power Negotiation
338 Figure 88 Soft Reset
Table 88 Steps for a Soft Reset
340 Figure 89 DFP Initiated Data Reset where the DFP is the Vconn Source
341 Table 89 Steps for a DFP Initiated Data Reset where the DFP is the Vconn Source
343 Figure 810 DFP Receives Data Reset where the DFP is the Vconn Source
344 Table 810 Steps for a DFP Receiving a Data Reset where the DFP is the Vconn Source
346 Figure 811 DFP Initiated Data Reset where the UFP is the Vconn Source
347 Table 811 Steps for a DFP Initiated Data Reset where the UFP is the Vconn Source
350 Figure 812 DFP Receives a Data Reset where the UFP is the Vconn Source
351 Table 812 Steps for a DFP Receiving a Data Reset where the UFP is the Vconn Source
354 Figure 813 Source initiated Hard Reset
355 Table 813 Steps for Source initiated Hard Reset
357 Figure 814 Sink Initiated Hard Reset
358 Table 814 Steps for Sink initiated Hard Reset
360 Figure 815 Source initiated reset – Sink long reset
361 Table 815 Steps for Source initiated Hard Reset ā€“ Sink long reset
364 Figure 816 Successful Power Role Swap Sequence Initiated by the Source
Table 816 Steps for a Successful Source Initiated Power Role Swap Sequence
369 Figure 817 Successful Power Role Swap Sequence Initiated by the Sink
370 Table 817 Steps for a Successful Sink Initiated Power Role Swap Sequence
374 Figure 818 Successful Fast Role Swap Sequence
375 Table 818 Steps for a Successful Fast Role Swap Sequence
378 Figure 819 Data Role Swap, UFP operating as Sink initiates
Table 819 Steps for Data Role Swap, UFP operating as Sink initiates
380 Figure 820 Data Role Swap, UFP operating as Source initiates
Table 820 Steps for Data Role Swap, UFP operating as Source initiates
382 Figure 821 Data Role Swap, DFP operating as Source initiates
Table 821 Steps for Data Role Swap, DFP operating as Source initiates
384 Figure 822 Data Role Swap, DFP operating as Sink initiates
Table 822 Steps for Data Role Swap, DFP operating as Sink initiates
386 Figure 823 Source to Sink Vconn Source Swap
387 Table 823 Steps for Source to Sink Vconn Source Swap
389 Figure 824 Sink to Source Vconn Source Swap
390 Table 824 Steps for Sink to Source Vconn Source Swap
392 Figure 825 Source Alert to Sink
393 Table 825 Steps for Source Alert to Sink
394 Figure 826 Sink Alert to Source
Table 826 Steps for Sink Alert to Source
395 Figure 827 Sink Gets Source Status
Table 827 Steps for a Sink getting Source Status Sequence
397 Figure 828 Source Gets Sink Status
Table 828 Steps for a Source getting Sink Status Sequence
399 Figure 829 Sink Gets Source PPS Status
Table 829 Steps for a Sink getting Source PPS status Sequence
401 Figure 830 Sink Gets Sourceā€™s Capabilities
Table 830 Steps for a Sink getting Source Capabilities Sequence
403 Figure 831 Dual-Role Source Gets Dual-Role Sinkā€™s Capabilities as a Source
Table 831 Steps for a Dual-Role Source getting Dual-Role Sinkā€™s capabilities as a Source Sequence
405 Figure 832 Source Gets Sinkā€™s Capabilities
Table 832 Steps for a Source getting Sink Capabilities Sequence
407 Figure 833 Dual-Role Sink Gets Dual-Role Sourceā€™s Capabilities as a Sink
Table 833 Steps for a Dual-Role Sink getting Dual-Role Source capabilities as a Sink Sequence
409 Figure 834 Sink Gets Sourceā€™s Extended Capabilities
Table 834 Steps for a Sink getting Source extended capabilities Sequence
411 Figure 835 Dual-Role Source Gets Dual-Role Sinkā€™s Extended Capabilities
Table 835 Steps for a Dual-Role Source getting Dual-Role Sink extended capabilities Sequence
413 Figure 836 Sink Gets Sourceā€™s Battery Capabilities
Table 836 Steps for a Sink getting Source Battery capabilities Sequence
415 Figure 837 Source Gets Sinkā€™s Battery Capabilities
Table 837 Steps for a Source getting Sink Battery capabilities Sequence
417 Figure 838 Sink Gets Sourceā€™s Battery Status
Table 838 Steps for a Sink getting Source Battery status Sequence
419 Figure 839 Source Gets Sinkā€™s Battery Status
Table 839 Steps for a Source getting Sink Battery status Sequence
421 Figure 840 Source Gets Sinkā€™s Port Manufacturer Information
Table 840 Steps for a Source getting Sinkā€™s Port Manufacturer Information Sequence
423 Figure 841 Sink Gets Sourceā€™s Port Manufacturer Information
Table 841 Steps for a Source getting Sinkā€™s Port Manufacturer Information Sequence
425 Figure 842 Source Gets Sinkā€™s Battery Manufacturer Information
Table 842 Steps for a Source getting Sinkā€™s Battery Manufacturer Information Sequence
427 Figure 843 Sink Gets Sourceā€™s Battery Manufacturer Information
Table 843 Steps for a Source getting Sinkā€™s Battery Manufacturer Information Sequence
429 Figure 844 Vconn Source Gets Cable Plugā€™s Manufacturer Information
Table 844 Steps for a Vconn Source getting Sinkā€™s Port Manufacturer Information Sequence
431 Figure 845 Source Gets Sinkā€™s Country Codes
Table 845 Steps for a Source getting Country Codes Sequence
433 Figure 846 Sink Gets Sourceā€™s Country Codes
Table 846 Steps for a Source getting Sinkā€™s Country Codes Sequence
435 Figure 847 Vconn Source Gets Cable Plugā€™s Country Codes
Table 847 Steps for a Vconn Source getting Sinkā€™s Country Codes Sequence
437 Figure 848 Source Gets Sinkā€™s Country Information
Table 848 Steps for a Source getting Country Information Sequence
439 Figure 849 Sink Gets Sourceā€™s Country Information
Table 849 Steps for a Source getting Sinkā€™s Country Information Sequence
441 Figure 850 Vconn Source Gets Cable Plugā€™s Country Information
Table 850 Steps for a Vconn Source getting Sinkā€™s Country Information Sequence
443 Figure 851 Source requests security exchange with Sink
Table 851 Steps for a Source requesting a security exchange with a Sink Sequence
445 Figure 852 Sink requests security exchange with Source
Table 852 Steps for a Sink requesting a security exchange with a Source Sequence
447 Figure 853 Vconn Source requests security exchange with Cable Plug
Table 853 Steps for a Vconn Source requesting a security exchange with a Cable Plug Sequence
449 Figure 854 Source requests firmware update exchange with Sink
Table 854 Steps for a Source requesting a firmware update exchange with a Sink Sequence
451 Figure 855 Sink requests firmware update exchange with Source
Table 855 Steps for a Sink requesting a firmware update exchange with a Source Sequence
453 Figure 856 Vconn Source requests firmware update exchange with Cable Plug
Table 856 Steps for a Vconn Source requesting a firmware update exchange with a Cable Plug Sequence
455 Figure 857 DFP to UFP Discover Identity
Table 857 Steps for DFP to UFP Discover Identity
457 Figure 858 Source Port to Cable Plug Discover Identity
Table 858 Steps for Source Port to Cable Plug Discover Identity
459 Figure 859 DFP to Cable Plug Discover Identity
Table 859 Steps for DFP to Cable Plug Discover Identity
461 Figure 860 DFP to UFP Enter Mode
Table 860 Steps for DFP to UFP Enter Mode
463 Figure 861 DFP to UFP Exit Mode
Table 861 Steps for DFP to UFP Exit Mode
465 Figure 862 DFP to Cable Plug Enter Mode
466 Table 862 Steps for DFP to Cable Plug Enter Mode
468 Figure 863 DFP to Cable Plug Exit Mode
Table 863 Steps for DFP to Cable Plug Exit Mode
470 Figure 864 UFP to DFP Attention
Table 864 Steps for UFP to DFP Attention
471 Figure 865 BIST Carrier Mode Test
472 Table 865 Steps for BIST Carrier Mode Test
473 Figure 866 BIST Test Data Test
474 Table 866 Steps for BIST Test Data Test
476 Figure 867 UFP Entering USB4 Mode (Valid)
Table 867 Steps for UFP USB4 Mode Entry (Valid)
478 Figure 868 Cable Plug Entering USB4 Mode (Valid)
Table 868 Steps for Cable Plug USB4 Mode Entry (Valid)
480 Figure 869 UFP Entering USB4 Mode (Invalid)
Table 869 Steps for UFP USB4 Mode Entry (Invalid)
482 Figure 870 Cable Plug Entering USB4 Mode (Invalid)
Table 870 Steps for Cable Plug USB4 Mode Entry (Invalid)
483 8.3.3 State Diagrams
Figure 871 Outline of States
484 Figure 872 References to states
Figure 873 Example of state reference with conditions
Figure 874 Example of state reference with the same entry and exit
485 Figure 875 Source Port Policy Engine State Diagram
491 Figure 876 Sink Port State Diagram
496 Figure 877 Source Port Soft Reset and Protocol Error State Diagram
497 Figure 878 Sink Port Soft Reset and Protocol Error Diagram
499 Figure 879 DFP Data_Reset Message State Diagram
501 Figure 880 UFP Data_Reset Message State Diagram
503 Figure 881 Source Port Not Supported Message State Diagram
504 Figure 882 Sink Port Not Supported Message State Diagram
505 Figure 883 Source Port Ping State Diagram
Figure 884 Source Port Source Alert State Diagram
506 Figure 885 Sink Port Source Alert State Diagram
Figure 886 Sink Port Sink Alert State Diagram
Figure 887 Source Port Sink Alert State Diagram
507 Figure 888 Sink Port Get Source Capabilities Extended State Diagram
Figure 889 Source Give Source Capabilities Extended State Diagram
508 Figure 890 Sink Port Get Source Status State Diagram
Figure 891 Source Give Source Status State Diagram
509 Figure 892 Source Port Get Sink Status State Diagram
Figure 893 Sink Give Sink Status State Diagram
510 Figure 894 Sink Port Get Source PPS Status State Diagram
Figure 895 Source Give Source PPS Status State Diagram
511 Figure 896 Get Battery Capabilities State Diagram
Figure 897 Give Battery Capabilities State Diagram
512 Figure 898 Get Battery Status State Diagram
Figure 899 Give Battery Status State Diagram
513 Figure 8100 Get Manufacturer Information State Diagram
Figure 8101 Give Manufacturer Information State Diagram
514 Figure 8102 Get Country Codes State Diagram
515 Figure 8103 Give Country Codes State Diagram
Figure 8104 Get Country Information State Diagram
516 Figure 8105 Give Country Information State Diagram
Figure 8106 DFP Enter_USB Message State Diagram
517 Figure 8107 UFP Enter_USB Message State Diagram
Figure 8108 Send security request State Diagram
518 Figure 8109 Send security response State Diagram
Figure 8110 Security response received State Diagram
519 Figure 8111 Send firmware update request State Diagram
Figure 8112 Send firmware update response State Diagram
520 Figure 8113 Firmware update response received State Diagram
521 Figure 8114: DFP to UFP Data Role Swap State Diagram
523 Figure 8115: UFP to DFP Data Role Swap State Diagram
525 Figure 8116: Dual-Role Port in Source to Sink Power Role Swap State Diagram
528 Figure 8117: Dual-role Port in Sink to Source Power Role Swap State Diagram
531 Figure 8118: Dual-Role Port in Source to Sink Fast Role Swap State Diagram
534 Figure 8119: Dual-role Port in Sink to Source Fast Role Swap State Diagram
536 Figure 8120 Dual-Role (Source) Get Source Capabilities diagram
537 Figure 8121 Dual-Role (Source) Give Sink Capabilities diagram
Figure 8122 Dual-Role (Sink) Get Sink Capabilities State Diagram
538 Figure 8123 Dual-Role (Sink) Give Source Capabilities State Diagram
Figure 8124 Dual-Role (Source) Get Source Capabilities Extended State Diagram
539 Figure 8125 Dual-Role (Source) Give Sink Capabilities diagram
540 Figure 8126 VCONN Swap State Diagram
543 Figure 8127 Initiator to Port VDM Discover Identity State Diagram
544 Figure 8128 Initiator VDM Discover SVIDs State Diagram
545 Figure 8129 Initiator VDM Discover Modes State Diagram
546 Figure 8130 Initiator VDM Attention State Diagram
547 Figure 8131 Responder Structured VDM Discover Identity State Diagram
548 Figure 8132 Responder Structured VDM Discover SVIDs State Diagram
549 Figure 8133 Responder Structured VDM Discover Modes State Diagram
550 Figure 8134 Receiving a Structured VDM Attention State Diagram
Figure 8135 DFP VDM Mode Entry State Diagram
552 Figure 8136 DFP VDM Mode Exit State Diagram
553 Figure 8137 UFP Structured VDM Enter Mode State Diagram
554 Figure 8138 UFP Structured VDM Exit Mode State Diagram
555 Figure 8139 Cable Ready VDM State Diagram
Figure 8140 Cable Plug Soft Reset State Diagram
556 Figure 8141 Cable Plug Hard Reset State Diagram
557 Figure 8142 Vconn Source Soft Reset or Cable Reset of a Cable Plug or VPD State Diagram
558 Figure 8143 Source Startup Structured VDM Discover Identity State Diagram
560 Figure 8144 Cable Plug Structured VDM Enter Mode State Diagram
561 Figure 8145 Cable Plug Structured VDM Exit Mode State Diagram
562 Figure 8146 BIST Carrier Mode State Diagram
564 Table 871 Policy Engine States
571 9. States and Status Reporting
9.1 Overview
572 Figure 91 Example PD Topology
573 9.1.1 PDUSB Device and Hub Requirements
9.1.2 Mapping to USB Device States
Figure 92 Mapping of PD Topology to USB
574 Figure 93 USB Attached to USB Powered State Transition
575 Figure 94 Any USB State to USB Attached State Transition (When operating as a Consumer)
Figure 95 Any USB State to USB Attached State Transition (When operating as a Provider)
576 9.1.3 PD Software Stack
9.1.4 PDUSB Device Enumeration
Figure 96 Any USB State to USB Attached State Transition (After a USB Type-C Data Role Swap)
Figure 97 Software stack on a PD aware OS
577 Figure 98 Enumeration of a PDUSB Device
578 9.2 PD Specific Descriptors
9.2.1 USB Power Delivery Capability Descriptor
Table 91 USB Power Delivery Type Codes
Table 92 USB Power Delivery Capability Descriptor
579 9.2.2 Battery Info Capability Descriptor
Table 93 Battery Info Capability Descriptor
580 9.2.3 PD Consumer Port Capability Descriptor
9.2.4 PD Provider Port Capability Descriptor
Table 94 PD Consumer Port Descriptor
Table 95 PD Provider Port Descriptor
582 9.3 PD Specific Requests and Events
9.3.1 PD Specific Requests
Table 96 PD Requests
Table 97 PD Request Codes
Table 98 PD Feature Selectors
583 9.4 PDUSB Hub and PDUSB Peripheral Device Requests
9.4.1 GetBatteryStatus
Table 99 Battery Status Structure
584 9.4.2 SetPDFeature
Table 910 Battery Wake Mask
585 Table 911 Charging Policy Encoding
586 10. Power Rules
10.1 Introduction
10.2 Source Power Rules
10.2.1 Source Power Rule Considerations
Table 101 Considerations for Sources
587 10.2.2 Normative Voltages and Currents
Table 102 Normative Voltages and Minimum Currents
588 Figure 101 Source Power Rule Illustration
Figure 102 Source Power Rule Example
589 Table 103 Fixed Supply PDO ā€“ Source 5V
Table 104 Fixed Supply PDO ā€“ Source 9V
Table 105 Fixed Supply PDO ā€“ Source 15V
Table 106 Fixed Supply PDO ā€“ Source 20V
590 10.2.3 Optional Voltages/Currents
591 Table 107 Programmable Power Supply PDOs and APDOs based on the PDP
Table 108 Programmable Power Supply Voltage Ranges
592 10.2.4 Power sharing between ports
10.3 Sink Power Rules
10.3.1 Sink Power Rule Considerations
10.3.2 Normative Sink Rules
594 A. CRC calculation
A.1 C code example
596 A.2 Table showing the full calculation over one Message
597 B. PD Message Sequence Examples
B.1 External power is supplied downstream
Figure B1 External Power supplied downstream
598 Table B1 External power is supplied downstream
601 B.2 External power is supplied upstream
Figure B2 External Power supplied upstream
Table B2 External power is supplied upstream
608 B.3 Giving back power
Figure B3 Giving Back Power
Table B3 Giving back power
620 C. VDM Command Examples
C.1 Discover Identity Example
C.1.1 Discover Identity Command request
C.1.2 Discover Identity Command response ā€“ Active Cable
Table C1 Discover Identity Command request from Initiator Example
Table C2 Discover Identity Command response from Active Cable Responder Example
622 C.1.3 Discover Identity Command response ā€“ Hub
Table C3 Discover Identity Command response from Hub Responder Example
623 C.2 Discover SVIDs Example
C.2.1 Discover SVIDs Command request
C.2.1 Discover SVIDs Command response
Table C4 Discover SVIDs Command request from Initiator Example
Table C5 Discover SVIDs Command response from Responder Example
625 C.3 Discover Modes Example
C.3.1 Discover Modes Command request
C.3.2 Discover Modes Command response
Table C6 Discover Modes Command request from Initiator Example
Table C7 Discover Modes Command response from Responder Example
627 C.4 Enter Mode Example
C.4.1 Enter Mode Command request
C.4.2 Enter Mode Command response
Table C8 Enter Mode Command request from Initiator Example
Table C9 Enter Mode Command response from Responder Example
628 Table C10 Enter Mode Command request from Initiator Example
629 C.5 Exit Mode Example
C.5.1 Exit Mode Command request
C.5.2 Exit Mode Command response
Table C11 Exit Mode Command request from Initiator Example
Table C12 Exit Mode Command response from Responder Example
631 C.6 Attention Example
C.6.1 Attention Command request
C.6.2 Attention Command request with additional VDO
Table C13 Attention Command request from Initiator Example
Table C14 Attention Command request from Initiator with additional VDO Example
633 D. BMC Receiver Design Examples
D.1 Finite Difference Scheme
D.1.1 Sample Circuitry
D.1.2 Theory
Figure D1 Circuit Block of BMC Finite Difference Receiver
634 Figure D2 BMC AC and DC noise from VBUS at Power Sink
Figure D3 Sample BMC Signals (a) without [USB 2.0] SE0 Noise (b) with [USB 2.0] SE0 Noise
635 D.1.3 Data Recovery
Figure D4 Scaled BMC Signal Derivative with 50ns Sampling Rate
Figure D5 BMC Signal and Finite Difference Output with Various Time Steps
636 D.1.4 Noise Zone and Detection Zone
D.2 Subtraction Scheme
D.2.1 Sample Circuitry
Figure D6 Output of Finite Difference in dash line and Edge Detector in solid line
Figure D7 Noise Zone and Detect Zone of BMC Receiver
637 D.2.2 Output of Each Circuit Block
D.2.3 Subtractor Output at Power Source and Power Sink
Figure D8 Circuit Block of BMC Subtraction Receiver
Figure D9 (a) Output of LPF1 and LPF2 (b) Subtraction of LPF1 and LPF2 Output
638 D.2.4 Noise Zone and Detection Zone
Figure D10 Output of the BMC LPF1 in blue dash curve and the Subtractor in red solid curve
639 E. FRS System Level Example
E.1 Overview
Figure E1 Example FRS Capable System
640 Figure E2 Slow VBUS Discharge
641 E.2 FRS Initial Setup
Figure E3 Fast VBUS Discharge
Table E1: Sequence Table for setup of a Fast Role Swap (Hub connected to Power Adapter first)
642 Table E2 Sequence Table for setup of a Fast Role Swap (Hub connected to Notebook before Power Adapter)
643 E.3 FRS Process
644 Figure E4 Sequence Diagram for slow Vbus discharge (it discharges after FR_Swap message is sent)
Table E3 Sequence Table for slow Vbus discharge (it discharges after FR_Swap message is sent)
645 Figure E-5: Sequence for Vbus discharges quickly (before FR_Swap message is sent) after adapter disconnected.
Table E4 Vbus discharges quickly after adapter disconnected.

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