{"id":236759,"date":"2024-10-19T15:27:26","date_gmt":"2024-10-19T15:27:26","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-en-60424-32016\/"},"modified":"2024-10-25T10:05:02","modified_gmt":"2024-10-25T10:05:02","slug":"bs-en-60424-32016","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-en-60424-32016\/","title":{"rendered":"BS EN 60424-3:2016"},"content":{"rendered":"

This part of IEC 60424<\/span> <\/span> gives guidelines on allowable limits of surface irregularities applicable to ETD-cores, EER-cores, EC-cores and E-cores in accordance with the relevant general specification.<\/p>\n

This standard is a specification useful in the negotiations between ferrite core manufacturers and customers about surface irregularities.<\/p>\n

PDF Catalog<\/h4>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
6<\/td>\nEnglish
CONTENTS <\/td>\n<\/tr>\n
7<\/td>\nFOREWORD <\/td>\n<\/tr>\n
9<\/td>\n1 Scope
2 Normative references
3 Terms and definitions <\/td>\n<\/tr>\n
10<\/td>\n4 Limits of surface irregularities
4.1 Chips and ragged edges
4.1.1 General
4.1.2 Chips and ragged edges on the mating surfaces
4.1.3 Chips and ragged edges on other surfaces
Tables
Table 1 \u2013 Allowable areas of chips for ETD-cores in mm2 <\/td>\n<\/tr>\n
11<\/td>\nTable 2 \u2013 Allowable areas of chips for EER-cores in mm2
Table 3 \u2013 Allowable areas of chips for EC-cores in mm2 <\/td>\n<\/tr>\n
12<\/td>\nTable 4 \u2013 Allowable areas of chips for E-cores in mm2 <\/td>\n<\/tr>\n
13<\/td>\nFigures
Figure 1 \u2013 Chip location for ETD-cores, EER-cores and EC-cores
Figure 2 \u2013 Chip location for E-cores <\/td>\n<\/tr>\n
14<\/td>\nTable 5 \u2013 Area and length reference for visual inspection <\/td>\n<\/tr>\n
15<\/td>\n4.2 Cracks
4.3 Flash
4.4 Pull-outs <\/td>\n<\/tr>\n
16<\/td>\nFigure 3 \u2013 Cracks and pull-out location for ETD-cores, EER-cores and EC-cores <\/td>\n<\/tr>\n
17<\/td>\nFigure 4 \u2013 Cracks and pull-out location for E-cores
Table 6 \u2013 Limits for cracks <\/td>\n<\/tr>\n
18<\/td>\n4.5 Crystallites
4.6 Pores
Figure 5 \u2013 Crystallites location for ETD-cores, EER-cores and EC-cores
Figure 6 \u2013 Crystallites location for E-cores <\/td>\n<\/tr>\n
19<\/td>\nFigure 7 \u2013 Pores location for ETD-cores, EER-cores and EC-cores
Figure 8 \u2013 Pores location for E-cores <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

Ferrite cores. Guidelines on the limits of surface irregularities – ETD-cores, EER-cores, EC-cores and E-cores<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
BSI<\/b><\/a><\/td>\n2016<\/td>\n22<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":236763,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[502,2641],"product_tag":[],"class_list":{"0":"post-236759","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-29-100-10","7":"product_cat-bsi","9":"first","10":"instock","11":"sold-individually","12":"shipping-taxable","13":"purchasable","14":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/236759","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/236763"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=236759"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=236759"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=236759"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}